Barebox state on am335x-phytec-phycore-som

[Martin Hollingsworth]

Hi,
I am trying to enable the barebox state framework and use it to store the bootchooser variables on the am335x-phytec-phycore-som board. I want to do that, so that the variables can be stored in EEPROM rather than in NAND (due to write/erase cycles).

I am following the steps from the documentation and from the mailing list from 2016 (http://lists.infradead.org/pipermail/barebox/2016-October/028312.html). However, all entries I try to add to the DTS/DTSI files fail to compile with a syntax error, even the example dtsi entry from the documentation.

Has anyone running a similar configuration and could help with some advice what has to be adapted? Can anyone recommend a good example code of the barebox state placed on EEPROM?

Thanks and regards,
Martin Hollingsworth

[Sam Ravnborg]

Hi Martin.

Post by Martin Hollingsworth
Hi,
I am trying to enable the barebox state framework and use it to
store the bootchooser variables on the am335x-phytec-phycore-som
board. I want to do that, so that the variables can be stored
in EEPROM rather than in NAND (due to write/erase cycles).
I am following the steps from the documentation and from
the mailing list from 2016
(http://lists.infradead.org/pipermail/barebox/2016-October/028312.html).
However, all entries I try to add to the DTS/DTSI files fail
to compile with a syntax error, even the example dtsi entry
from the documentation.
Has anyone running a similar configuration and could help
with some advice what has to be adapted?
Can anyone recommend a good example code of the barebox state placed on EEPROM?

The following builds. Maybe this is a small step in the right direction.
Just added from state-example.dts and from the documentation.

Sam

diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dts b/arch/arm/dts/am335x-phytec-phycore-som.dts
index f13e0d6bd..f62620be0 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dts
@@ -13,12 +13,41 @@
/ {
model = "Phytec phyCORE AM335x";
compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
+
+ state: state {
+ magic = <0x27031977>;
+ compatible = "barebox,state";
+ backend-type = "raw";
+ backend = <&backend_state_eeprom>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ foo {
+ reg = <0x00 0x4>;
+ type = "uint32";
+ default = <0x0>;
+ };
+
+ bar {
+ reg = <0x10 0x4>;
+ type = "enum32";
+ names = "baz", "qux";
+ default = <1>;
+ };
+ };
};

&spi0 {
status = "okay";
};
-
&eeprom {
status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #size-cells = <1>;
+ #address-cells = <1>;
+ backend_state_eeprom: ***@400 {
+ reg = <0x400 0x400>;
+ label = "state-eeprom";
+ };
+ };
};

[Çağlar Kilimci]

Hi all,

Post by Sam Ravnborg
Hi Martin.

Post by Martin Hollingsworth
Hi,
I am trying to enable the barebox state framework and use it to
store the bootchooser variables on the am335x-phytec-phycore-som
board. I want to do that, so that the variables can be stored
in EEPROM rather than in NAND (due to write/erase cycles).

I was exactly trying to do the same thing, 3-4 months ago. There is
something missing or missleading in the documentation. First of all,
you need to compile dts for both barebox and kernel. Each time I would
like to make a change, I change both barebox dts and kernel dts. These
are two similar but actually two different dts files. As an example,
in am335x-phytec-phycore-som.dtsi eeprom device name is "eeprom" but
"i2c_eeprom" in kernel's dts. Secondly, backend-storage-type and
backend-stridesize have some importance. Even if they are written
optional in the documentation, I could not run without them. You need
to calculate "backend-stridesize". Lastly, backend should be like this
"backend = <&eeprom>;". Here is the barebox patch I use:

diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index 0b8c454..62598cd 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -14,6 +14,86 @@
status = "disabled";
};
};
+
+ state {
+ magic = <0x4aaef993>;
+ compatible = "barebox,state";
+ backend-type = "raw";
+ backend = <&eeprom>;
+ backend-storage-type = "direct";
+ backend-stridesize = <0xf0>;
+ bootchooser {
+ system1 {
+ boot{
+ reg = <0x0 0x10>;
+ type = "string";
+ default = "system1";
+ };
+ default_attempts {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ default_priority {
+ reg = <0x14 0x4>;
+ type = "uint32";
+ default = <0x10>;
+ };
+ remaining_attempts {
+ reg = <0x18 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ priority {
+ reg = <0x1c 0x4>;
+ type = "uint32";
+ default = <0x10>;
+ };
+ };
+ system2 {
+ boot{
+ reg = <0x20 0x10>;
+ type = "string";
+ default = "system2";
+ };
+ default_attempts {
+ reg = <0x30 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ default_priority {
+ reg = <0x34 0x4>;
+ type = "uint32";
+ default = <0x0f>;
+ };
+ remaining_attempts {
+ reg = <0x38 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ priority {
+ reg = <0x3c 0x4>;
+ type = "uint32";
+ default = <0x0f>;
+ };
+ };
+ last_chosen {
+ reg = <0x40 0x4>;
+ type = "uint32";
+ default = <0x01>;
+ };
+ boot_to_be {
+ reg = <0x50 0x10>;
+ type = "string";
+ default = "none";
+ };
+ update_id {
+ reg = <0x60 0x10>;
+ type = "string";
+ default = "none";
+ };
+ };
+ };
};

&am33xx_pinmux {


Hope, this helps.

Sincerely,

[Martin Hollingsworth]

Hello Sam, Hello Caglar,
Thanks to you both for your quick support!

With the configuration of Caglar the state framework is directly detected by barebox. And because my setup seems to pass the DTS from barebox to the linux kernel the dt-utils under linux can directly read/write the state - in my case even without the need to modify the linux dts files. Only thing left now is to configure it all together with bootchooser :-)

Thanks again and cheers,
Martin

-----Ursprüngliche Nachricht-----
Von: Çağlar Kilimci [mailto:***@gmail.com]
Gesendet: Freitag, 21. Juli 2017 08:47
An: Sam Ravnborg <***@ravnborg.org>
Cc: Martin Hollingsworth <***@itk-engineering.de>; ***@lists.infradead.org
Betreff: Re: Barebox state on am335x-phytec-phycore-som

Hi all,

Post by Sam Ravnborg
Hi Martin.

Post by Martin Hollingsworth
Hi,
I am trying to enable the barebox state framework and use it to store
the bootchooser variables on the am335x-phytec-phycore-som board. I
want to do that, so that the variables can be stored in EEPROM rather
than in NAND (due to write/erase cycles).

I was exactly trying to do the same thing, 3-4 months ago. There is something missing or missleading in the documentation. First of all, you need to compile dts for both barebox and kernel. Each time I would like to make a change, I change both barebox dts and kernel dts. These are two similar but actually two different dts files. As an example, in am335x-phytec-phycore-som.dtsi eeprom device name is "eeprom" but "i2c_eeprom" in kernel's dts. Secondly, backend-storage-type and backend-stridesize have some importance. Even if they are written optional in the documentation, I could not run without them. You need to calculate "backend-stridesize". Lastly, backend should be like this "backend = <&eeprom>;". Here is the barebox patch I use:

diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index 0b8c454..62598cd 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -14,6 +14,86 @@
status = "disabled";
};
};
+
+ state {
+ magic = <0x4aaef993>;
+ compatible = "barebox,state";
+ backend-type = "raw";
+ backend = <&eeprom>;
+ backend-storage-type = "direct";
+ backend-stridesize = <0xf0>;
+ bootchooser {
+ system1 {
+ boot{
+ reg = <0x0 0x10>;
+ type = "string";
+ default = "system1";
+ };
+ default_attempts {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ default_priority {
+ reg = <0x14 0x4>;
+ type = "uint32";
+ default = <0x10>;
+ };
+ remaining_attempts {
+ reg = <0x18 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ priority {
+ reg = <0x1c 0x4>;
+ type = "uint32";
+ default = <0x10>;
+ };
+ };
+ system2 {
+ boot{
+ reg = <0x20 0x10>;
+ type = "string";
+ default = "system2";
+ };
+ default_attempts {
+ reg = <0x30 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ default_priority {
+ reg = <0x34 0x4>;
+ type = "uint32";
+ default = <0x0f>;
+ };
+ remaining_attempts {
+ reg = <0x38 0x4>;
+ type = "uint32";
+ default = <0x03>;
+ };
+ priority {
+ reg = <0x3c 0x4>;
+ type = "uint32";
+ default = <0x0f>;
+ };
+ };
+ last_chosen {
+ reg = <0x40 0x4>;
+ type = "uint32";
+ default = <0x01>;
+ };
+ boot_to_be {
+ reg = <0x50 0x10>;
+ type = "string";
+ default = "none";
+ };
+ update_id {
+ reg = <0x60 0x10>;
+ type = "string";
+ default = "none";
+ };
+ };
+ };
};

&am33xx_pinmux {


Hope, this helps.

Sincerely,